Meter BL0921

BL0921

    Single Phase Energy Meter IC with Integrated Oscillator

FEATURES

Ø   High accuracy, less than 0.1% error over a dynamic range of 500: 1

Ø   On-chip oscillator as clock source

Ø   Exactly measure the real power in the positive orientation and negative orientation, calculate the energy in the same orientation

Ø   Two current monitors continuously monitor the phase and neutral currents in two-wire      distribution systems. Uses the larger of two currents to bill, even during a Fault condition

Ø    A PGA in the current channel allows using small value shunt and burden resistance

Ø    The low frequency outputs F1 and F2 can directly drive electromechanical counters and two phase stepper motors and the high frequency output CF, supplies instantaneous real power, is intended for calibration and communications

Ø   Two logic outputs REVP and FAULT can be used to indicate a potential orientation or Fault condition

Ø   On-Chip power supply detector

Ø   On-Chip anti-creep protection

Ø   On-Chip voltage reference of 2.5V±8%

Ø   Single 5V supply

Ø   Low static power (typical value of 25mW).

Ø   The technology of SLIM (Smart–Low–current– Management) is used.

Ø   Credible work, working time is more than twenty years Interrelated patents are pending

DESCRIPTION

              The BL0921 is a low cost, high accuracy, high stability, simple peripheral circuit electrical energy meter IC. The meter based on the BL0921 is intended for using in single-phase, two-wire distribution systems. It can exactly measure the real power in the positive orientation and negative orientation and calculate the energy in the same orientation. The BL0921 incorporates a novel fault detection scheme that both warns of fault conditions and allows the BL0921 to continue accurate billing during a fault event. The BL0921 does this by continuously

Monitoring both the phase and neutral (return) currents. PIN12 (FAULT) indicates Fault condition, when these currents differ by more than 12.5%.Billing is continued using the larger of the two  currents when the difference is greater than 14%.The BL0921 supplies average real power information on the low frequency outputs F1 (Pin16)  and F2 (Pin15). These logic outputs may be used to directly drive an electromechanical counter and two-phase stepper motors. The CF (Pin14) logic output gives instantaneous real power information. This output is intended to be used for calibration purposes or interface to an MCU.BL0921 thinks over the stability of reading

error in the process of calibration. Bulk test data indicate that in the condition of small signal 5%IB (Ib=5A), the error of CF is less than 0.1%. An internal no-load threshold ensures that the BL0921 does not exhibit any creep when there is no load.

PIN DESCRIPTIONS :

1. VDD: Power Supply (+5V). Provides the supply voltage for the digital circuitry. It should be

Maintained at 5 V±5% for specified operation.

2,3 V1A,V1B: Inputs for Current Channel. These inputs are fully differential voltage inputs with a maximum signal level of ±660 mV with respect to pin6 (V1N) for specified operation.

4 V1N: Negative Input Pin for Differential Voltage Inputs V1A and V1B.

5,6 V2N,V2P:Negative and Positive Inputs for Voltage Channel. These inputs provide a fully

differential input pair. The maximum differential input voltage is ±660 mV for specified operation.

7 VREF : On-Chip Voltage Reference. The on-chip reference has a nominal value of 2.5V ±8% . An external reference source may also be connected at this pin.

8 AGND : Ground Reference. Provides the ground reference for the circuitry.

9,10 S1,S0 :Output Frequency Select. These logic inputs are used to select one of four possible   frequencies for the digital-to-frequency conversion. This offers the designer greater flexibility when designing the energy meter.

11 G: Gain Select. These logic inputs are used to select one of four possible gains for current

channel. The possible gains are 1 and 16.

12 FAULT :Fault Indication. Logic high indicates fault condition. Fault is defined as a condition

under which the signals on V1A and V1B differ by more than 12.5%. The logic output will be reset to zero when fault condition is no longer detected.

13 REVP :Negative Indication. Logic high indicates negative power, i.e., when the phase angle between the voltage and current signals is greater that 90°. This output is not latched and will be reset when positive power is once again detected.

14 CF : Calibration Frequency. The CF logic output gives instantaneous real power information. This output is intended to use for calibration purposes.

15,16 F1,F2 : Low-Frequency. F1 and F2 supply average real power information. The logic outputs  can be used to directly drive electromechanical counters and 2-phase stepper motors.

Notes:

1) CF is not synchronous to F1 or F2 frequency outputs.

2) Sample tested during initial release and after any redesign or process changes that may affect this parameter.

THEORY OF OPERATION:

Ø  Principle of Energy Measure :

                           In energy measure, the power information varying with time is calculated by a direct multiplication of the voltage signal and the current signal. Assume that the current signal and the voltage signal are cosine functions; V and I are the peak values of the voltage signal and the current signal; ωis the angle frequency of the input signals; the phase difference between the

current signal and the voltage signal is expressed as Ф. Then the power is given as follows:

           

p(t) = V cos(wt) X Icos(wt + Ф )

p(t) is called as the instantaneous power signal. The ideal p(t) consists of the dc component and ac component whose frequency is 2ω. The dc component is called as the average active power, that is:

                        P=VI(cos(Ф )/2

The average active power is related to the cosine value of the phase difference between the voltage signal and the current signal. This cosine value is called as Power Factor (PF) of the two channel signals.

                                                  Figure1. The Effect of phase

When the signal phase difference between the voltage and current channels is more than 90°, the

Average  active power is negative. It indicates the user is using the electrical energy reversely.

Ø  Operation Process :

In BL0921, the two ADCs digitize the voltage signals from the current and voltage transducers. These ADCs are 16-bit second order sigma-delta with an over sampling rate of 900 kHz. This analog input structure greatly simplifies transducer interfacing by providing a wide dynamic range for direct connection to the transducer and also simplifying the anti-alias filter design. A programmable gain stage in the current channel further facilitates easy transducer interfacing. A high pass filter in the current channel removes any dc component from the current signal. This eliminates any inaccuracies in the real power calculation due to offsets in the voltage or current signals. The real power calculation is derived from the instantaneous power signal. The instantaneous power signal is generated by a direct multiplication of the current and voltage signals. In order to extract the real power component (i.e., the dc component), the instantaneous power signal is low-pass filtered. Figure 2 illustrates the instantaneous real power signal and shows how the real power information can be extracted by low-pass filtering the instantaneous power signal. This scheme correctly calculates real power for non-sinusoidal current and voltage waveforms at all power factors. All signal processing is carried out in the digital domain for superior stability over temperature and time.

Accumulating this real power information generates the low frequency output of the BL0921. This low frequency inherently means a long accumulation time between output pulses. The output frequency is therefore proportional to the average real power. This average real power information can, in turn, be accumulated (e.g., by a counter) to generate real energy information. Because of its high output frequency and hence shorter integration time, the CF output is proportional to the instantaneous real power. This is useful for system calibration purposes that would take place under steady load conditions.

Ø   Offset Effect :

                                  The dc offsets come from the input signals and the forepart analog circuitry.

Assume that the input dc offsets on the voltage channel and the current channel are Uoffset and Ioffset, and PF equals 1 (φ=0).

                                            

Figure 3. Effect of Offset

As can be seen, for each phase input, if there are simultaneous dc offsets on the voltage channel

and the current channel, these offsets contribute a dc component for the result of multiplication.

That is, the offsets bring the error of Uoffset×Ioffset to the final average real power. Additionally, there exists the component of Uoffset×I+U×Ioffset at the frequency of ω. The dc error on the real power will result in measure error, and the component brought to the frequency of ω will also affect the output of the average active power when the next low-pass filter cannot restrain the ac component very completely. When the offset on the one of the voltage and the current channels is filtered, for instance, the offset on the current channel is removed; the result of multiplication is improved greatly. There is no dc error, and the additional component at the frequency of ω is also decreased. When the offsets on the voltage channel and the current channel are filtered respectively by two high-pass filters, the component at the frequency of ω (50Hz) is subdued, and the stability of the output signal is advanced. Moreover, in this case, the phases of the voltage channel and the current channel can be matched completely, and the performance when PF equal 0.5C or 0.5L is improved. In BL0921, this structure is selected. Though it is given in the system specification that the ripple of the output signal is less than 0.1%, in real measure of BL0921, the calibration output is very stable, and the ripple of the typical output signal is less than 0.05%. Additionally, this structure can ensure the frequency characteristic. When the input signal changes from 45Hz to 65Hz, the complete machine error due to the frequency change is less than 0.1%. In such, the meter designed for the 50Hz input signal can be used on the transmission-line system of electric power whose frequency is 60Hz.

Ø  Voltage Channel Input :

                    The output of the line voltage transducer is connected to the BL0921 at this analog input. As Figure4 shows that channel V2 is a fully differential voltage input. The maximum peak differential signal on Channel 2 is ±660mV. Figure4 illustrates the maximum signal levels that can be connected to the BL0921 Voltage Channel.

                                          Figure 4. Voltage Channels

Voltage Channel must be driven from a common-mode voltage, i.e., the differential voltage signal on the input must be referenced to a common mode (usually GND). The analog inputs of the BL0921 can be driven with common-mode voltages of up to 100 mV with respect to GND.

However, best results are achieved using a common mode equal to GND. Figure5 shows two typical connections for Channel V2. The first option uses a PT (potential transformer) to provide complete isolation from the mains voltage. In the second option, the BL0921 is biased around the neutral wire and a resistor divider is used to provide a voltage signal that is proportional to the line voltage. Adjusting the ratio of Ra and Rb is also a convenient way of carrying out a gain calibration on the meter.

                            Figure 5. Typical Connections for Voltage Channels

Ø  Current Channel Input

The voltage outputs from the current transducers are connected to the BL0921 here. As Figure6

shows that channel V1 has two voltage inputs, namely V1A and V1B. These inputs are fully

differential with respect to V1N. However, at any one time, only one is selected to perform the

power calculation.

                                                      Figure 6. Current Channels

The analog inputs V1A, V1B and V1N have same maximum signal level restrictions as V2P and

V2N. However, Channel 1 has a programmable gain amplifier (PGA) with user-selectable gains of 1 or 16. These gains facilitate easy transducer interfacing. Figure illustrates the maximum signal levels on V1A, V1B, and V1N. The maximum differential voltage is±660 mV divided by the gain selection. Again, the differential voltage signal on the inputs must be referenced to a common mode, e.g., GND. The maximum common-mode signal is ±100 mV. Figure7 shows a typical connection diagram for Channel V1. Here the analog inputs are being used to monitor both the phase and neutral currents. Because of the large potential difference between the phase and neutral, two CTs (current transformers) must be used to provide the isolation. The CT turns ratio and burden resistor (Rb) are selected to give a peak differential voltage of ±660 mV/gain.

                                          Figure 7. Typical Connections for Current Channels

Ø  Fault Detection :

                    The BL0921 incorporates a novel fault detection scheme that warns of fault conditions and allows the BL0921 to continue accurate billing during a fault event. The BL0921 does this by continuously monitoring both the phase and neutral (return) currents. A fault is indicated when these currents differ by more than 12.5%. However, even during a fault, the output pulse rate on F1 and F2 is generated using the larger of the two currents. Because the BL0921 looks for a difference between the signals on V1A and V1B, it is important that both current transducers are closely matched. On power-up the output pulse rate of the BL0921 is proportional to the product of the signals on Channel V1A and Voltage Channel. If there is a difference of greater than 12.5% between V1A and V1B on power-up, the fault indicator (FAULT) will go active after about one second. In addition, if V1B is greater than V1A the BL0921 will select V1B as the input. The fault detection is automatically disabled when the voltage signal on Channel 1 is less than 0.5% of the full-scale input range. This will eliminate false detection of a fault due to noise at light loads. If V1A is the active current input (i.e., is being used for billing), and the signal on V1B (inactive input) falls by more than 12.5% of V1A, the fault indicator will go active. Both analog inputs are filtered and averaged to prevent false triggering of this logic output. As a consequence of the filtering, there is a time delay of approximately one second on the logic output FAULT after the fault event. The FAULT logic output is independent of any activity on outputs F1 or F2. Figure 8 illustrates one condition under which FAULT becomes active. Since V1A is the active input and it is still greater than V1B, billing is maintained on VIA, i.e., no swap to the V1B input will occur. V1A remains the active input.

                              Figure 8. Fault Conditions for Inactive Input Less than Active Input

Figure 9 illustrates another fault condition. If V1A is the active input (i.e., is being used for billing) and the voltage signal on V1B (inactive input) becomes greater than 114% of V1A, the FAULT indicator goes active, and there is also a swap over to the V1B input. The analog input V1B has now become the active input. Again there is a time delay of about 1.2 seconds associated with this swap. V1A will not swap back to being the active channel until V1A becomes greater than 114% of V1B. However, the FAULT indicator will become inactive as soon as V1A is within 12.5% of V1B. This threshold eliminates potential chatter between V1A and  V1B.

                                 Figure 9. Fault Conditions for Inactive Input Greater than Active Input

Ø  Power Supply Monitor  :

                      The BL0921 contains an on-chip power supply monitor. If the supply is less than 4V±5% then the BL0921 will go in an inactive state, i.e., no energy will be accumulated when the supply voltage is below 4V. This is useful to ensure correct device operation at power up and during power down. The power supply monitor has built-in hysteresis and filtering. This gives a high degree of immunity to false triggering due to noisy supplies. The trigger level is nominally set at 4V, and the tolerance on this trigger level is about ±5%. The power supply and decoupling for the part should be such that the ripple at VDD does not exceed 5V±5% as specified for normal operation.

Ø   SLiM Technology :

                        The BL0921 adopts the technology of SLiM (Smart Low current Management) to decrease the static power greatly. The static power of BL0921 is about 15mW. This technology also decreases the request for power supply design. BL65XX series products used 0.35um CMOS process. The reliability and consistency are advanced.

Ø   OPERATION MODE

·          Transfer Function

                            The BL0921 calculates the product of two voltage signals (on Channel 1 and Channel 2) and then low-pass filters this product to extract real power information. This real power information is then converted to a frequency. The frequency information is output on F1 and F2 in the form of active low pulses. The pulse rate at these outputs is relatively low. It means that the frequency at these outputs is generated from real power information accumulated over a relatively long period of time. The result is an output frequency that is proportional to the average real power. The average of the real power signal is implicit to the digital-to-frequency conversion. The output frequency or pulse rate is related to the input voltage signals by the following equation.

·         Frequency Output CF :

                                The pulse output CF (Calibration Frequency) is intended for use during calibration. The output pulse rate on CF can be up to 128 times the pulse rate on F1 and F2. The following Table shows how the two frequencies are related, depending on the states of the logic inputs S0, S1 and SCF.

Because of its relatively high pulse rate, the frequency at this logic output is proportional to the instantaneous real power. As is the case with F1 and F2, the frequency is derived from the output

of the low-pass filter after multiplication. However, because the output frequency is high, this real power information is accumulated over a much shorter time. Hence less averaging is carried out in the digital-to-frequency conversion. With much less averaging of the real power signal, the CF output is much more responsive to power fluctuations.

·          Gain Selection

                       By select the digital input G0 and G1 voltage (5V or 0V), we can adjust the gain of current channel. We can see that while increasing the gain, the input dynamic range is decreasing.

·         Analog Input Range

                      The maximum peak differential signal on Voltage Channel is ± 660 mV, and the common-mode voltage is up to 100 mV with respect to GND.The analog inputs V1A, V1B, and V1N have the same maximum signal level restrictions as V2P and V2N. However, The Current Channel has a programmable gain amplifier (PGA) with user-selectable gains of 1,16. These gains facilitate easy transducer interfacing. The maximum differential voltage is ±660 mV and the maximum common-mode signal is ±100 mV.The corresponding Max Frequency of CF/F1/F2 is shown in the following table.

·         Package Dimensions

SOP16

PROTEUS SCHEMATIC: